Communications protocols are changing rapidly. Modern communication devices are required to easily adjust to these changes. The adjustment may involve providing programmable control codes that may be tailored per communication protocol. Embedded RISC processors that are included within such communication devices may be programmed to execute these control codes.
A control code may include multiple conditional instruction groups. A typical conditional instruction group may alter a value of one or more bits based on a value of one or more control bits. For example, a “last” indication bit of a buffer descriptor can be set if a control bit of a status register indicates that an end of a frame was detected. A typical conditional instruction group may include two or three instructions. For example, a first instruction may check a value of a control bit and a second instruction (that may be referred to as a conditional branch instruction) may branch based on the value of the control bit.
Control codes usually include a large number of conditional instruction groups. The execution of these conditional instruction groups may reduce the throughput of a communication device that includes an embedded RISC processor.